Using sparse crossbars within LUT

In FPGAs, the internal connections in a cluster of lookup tables (LUTs) are often fully-connected like a full crossbar. Such a high degree of connectivity makes routing easier, but has significant area overhead. This paper explores the use of sparse crossbars as a switch matrix inside the clusters between the cluster inputs and the LUT inputs. We have reduced the switch densities inside these matrices by 50% or more and saved from 10 to 18% in area with no degradation to critical-path delay. To compensate for the loss of routability, increased compute time and spare cluster inputs are required. Further investigation may yield modest area and delay reductions.

• Type: Conference
• Year: 2001
• Where: FPGA
• Authors: Guy G. Lemieux, David M. Lewis
• Keywords: Cluster Inputs, FPGA, FPGA 2001, Significant Area Overhead, Spare Cluster Inputs