Run-Time Spatial Locality Detection and Optimization

As the disparity between processor and main memory performance grows, the number of execution cycles spent waiting for memory accesses to complete also increases. As a result, latency hiding techniques are critical for improved application performance on future processors. In this paper we examine the spatial locality characteristics of several applications, and show that spatial locality varies substantially across and within applications. We then present a microarchitecture scheme which detects and adapts to this varying spatial locality, dynamically adjusting the amount of data fetched on a cache miss. The Spatial Locality Detection Table, introduced in this paper, facilitates the detection of spatial locality across adjacent small cached blocks. Results from detailed simulations of several integer programs show signi cant speedups. The improvements are due to the reduction of con ict and capacity misses by utilizing small blocks and small fetch sizes when spatial locality is absen...

• Type: Conference
• Year: 1997
• Where: MICRO
• Authors: Teresa L. Johnson, Matthew C. Merten, Wen-mei W. Hwu
• Keywords: Hardware, MICRO 1997, Spatial Locality, Spatial Locality Characteristics, Spatial Locality Varies