An Efficient Computation of Statistically Critical Sequential Paths Under Retiming

Abstract-- In this paper we present the Statistical Retimingbased Timing Analysis (SRTA) algorithm. The goal is to compute the timing slack distribution for the nodes in the timing graph and identify the statistically critical paths under retiming, which are the paths with a high probability of becoming timingcritical after retiming. SRTA enables the designers to perform circuit optimization on these paths to reduce the probability of them becoming timing bottleneck if the circuit is retimed as a post-process. We provide a comparison among static timing analysis (= STA), statistical timing analysis (= SSTA), retimingbased timing analysis (= RTA), and our statistical retiming-based timing analysis (SRTA). Our results show that the placement optimization based on SRTA achieves the best performance results.

• Type: Conference
• Year: 2007
• Where: ASPDAC
• Authors: Mongkol Ekpanyapong, Xin Zhao, Sung Kyu Lim
• Keywords: ASPDAC 2007, Hardware, Retimingbased Timing Analysis, Statistical Retimingbased Timing, Timing Analysis