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WSC
1998

Effective Implementation of Cycle Time Reduction Strategies for Semiconductor Back-end Manufacturing

13 years 5 months ago
Effective Implementation of Cycle Time Reduction Strategies for Semiconductor Back-end Manufacturing
Using discrete-event simulation models, a study was conducted to evaluate the current production practices of a high-volume semiconductor back-end operation. The overall goal was to find potential areas for productivity improvement that would collectively yield a 60% reduction in manufacturing cycle time. This paper presents the simulation methodology and findings pertaining to analysis of the Assembly, Burn-In, and Test operations. Many of the recommendations identified can be implemented at no additional cost to the factory. The most significant opportunities for improvement are in the Test area, the system constraint. Additionally, the model is extremely sensitive to changes in operator staffing levels, an accurate reflection of many back-end operations. The model shows that the cumulative impact of these recommendations is a 41% reduction in average cycle time, a significant contribution to the overall goal.
Joerg Domaschke, Steven Brown, Jennifer Robinson,
Added 01 Nov 2010
Updated 01 Nov 2010
Type Conference
Year 1998
Where WSC
Authors Joerg Domaschke, Steven Brown, Jennifer Robinson, Franz Leibl
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