A lock-free, cache-efficient multi-core synchronization mechanism for line-rate network traffic monitoring

Line-rate data traffic monitoring in high-speed networks is essential for network management. To satisfy the line-rate requirement, one can leverage multi-core architectures to parallelize traffic monitoring so as to improve information processing capabilities over traditional uni-processor architectures. Nevertheless, realizing the full potential of multi-core architectures still needs substantial work, especially in the face of the ever-increasing volume and complexity of network traffic. This paper addresses the issue through the design of a lock-free, cache-efficient synchronization mechanism that serves as a basic building block for a general class of multithreaded, multi-core traffic monitoring applications. We embed the synchronization mechanism into MCRingBuffer, a multicore shared ring buffer that provides fast data accesses among threads running in different cores. MCRingBuffer allows concurrent lock-free data accesses and improves the cache locality of accessing the control ...

• Type: Journal
• Year: 2010
• Where: IPPS
• Authors: Patrick P. C. Lee, Tian Bu, Girish P. Chandranmenon
• Keywords: Distributed And Parallel Computing, IPPS 2010, Multi-core, Multi-core Architectures, Traffic Monitoring