An Effective Framework to Evaluate Dynamic Partial Reconfiguration in FPGA Systems

Abstract--The most popular representative devices of reconfigurable computing are the Field Programmable Gate Arrays (FPGAs). A promising feature of an FPGA is the ability to reuse the same hardware for different tasks at different phases of an application execution. Moreover, the tasks can be swapped on the fly while part of the hardware continues to operate. This is known as dynamic reconfiguration and evaluation of its performance presents interesting research challenges. This paper introduces a general framework to measure the reconfiguration time from the system perspective. In addition, a methodology to setup different system parameters, gather and process automatically the experimental results has been developed. It is proven that these parameters affect applications designed in a dynamically reconfigurable system, and rapid evaluation enables the quick examination of their impact on performance. Results demonstrate the usefulness of the framework.

• Type: Journal
• Year: 2010
• Where: TIM
• Authors: Kyprianos Papadimitriou, Antonis Anyfantis, Apostolos Dollas
• Keywords: Education, Field Programmable Gate, Popular Representative Devices, Reconfigurable Computing, TIM 2010