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SIGCOMM
2012
ACM

On-chip networks from a networking perspective: congestion and scalability in many-core interconnects

11 years 7 months ago
On-chip networks from a networking perspective: congestion and scalability in many-core interconnects
In this paper, we present network-on-chip (NoC) design and contrast it to traditional network design, highlighting similarities and differences between the two. As an initial case study, we examine network congestion in bufferless NoCs. We show that congestion manifests itself differently in a NoC than in traditional networks. Network congestion reduces system throughput in congested workloads for smaller NoCs (16 and 64 nodes), and limits the scalability of larger bufferless NoCs (256 to 4096 nodes) even when traffic has locality (e.g., when an application’s required data is mapped nearby to its core in the network). We propose a new source throttlingbased congestion control mechanism with application-level awareness that reduces network congestion to improve system performance. Our mechanism improves system performance by up to 28% (15% on average in congested workloads) in smaller NoCs, achieves linear throughput scaling in NoCs up to 4096 cores (attaining similar performance sc...
George Nychis, Chris Fallin, Thomas Moscibroda, On
Added 27 Sep 2012
Updated 27 Sep 2012
Type Journal
Year 2012
Where SIGCOMM
Authors George Nychis, Chris Fallin, Thomas Moscibroda, Onur Mutlu, Srinivasan Seshan
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