Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

37

ASPLOS
2009
ACM

favoriteEmaildiscussreport

130views Programming Languages» more ASPLOS 2009»

Early experience with a commercial hardware transactional memory implementation

14 years 5 months ago

Early experience with a commercial hardware transactional memory implementation

Download research.sun.com

We report on our experience with the hardware transactional memory (HTM) feature of two pre-production revisions of a new commercial multicore processor. Our experience includes a number of promising results using HTM to improve performance in a variety of contexts, and also identifies some ways in which the feature could be improved to make it even better. We give detailed accounts of our experiences, sharing techniques we used to achieve the results we have, as well as describing challenges we faced in doing so.

David Dice, Yossi Lev, Mark Moir, Daniel Nussbaum

Real-time Traffic

ASPLOS 2009 | Commercial Multicore Processor | Hardware Transactional Memory | Programming Languages |

claim paper

Related Content

» Experiments with HPF Compilation for a Network of Workstations

» A Compact Transactional Memory Multiprocessor System on FPGA

» Integrating MessagePassing and SharedMemory Early Experience

» Scalable and reliable communication for hardware transactional memory

» Memory System Characterization of Commercial Workloads

» Testing implementations of transactional memory

» Hardware acceleration of transactional memory on commodity systems

» Simplifying concurrent algorithms by exploiting hardware transactional memory

» Bloom Filter Guided Transaction Scheduling

Post Info
More Details (n/a)

Added	22 Nov 2009
Updated	22 Nov 2009
Type	Conference
Year	2009
Where	ASPLOS
Authors	David Dice, Yossi Lev, Mark Moir, Daniel Nussbaum

Comments (0)