Minimizing power across multiple technology and design levels

Approaches to achieve low-power and high-speed VLSI's are described with the emphasis on techniques across multiple technology and design levels. To suppress the leakage current in a standby mode, Boosted Gate MOS (BGMOS) is effective, which is based on cooperation between technology level and circuit level. To reduce the power in an active mode, VDDhopping and VTH-hopping are promising, which are cooperative approaches between circuit and software. Power consumed in interconnect system can be reduced by a cooperative approach between application and layout as in bus shuffling. Other lowpower design approaches are also discussed.

• Type: Conference
• Year: 2002
• Where: ICCAD
• Authors: Takayasu Sakurai
• Keywords: Cooperative Approaches, Hardware, ICCAD 2002, Lowpower Design Approaches, Standby Mode