Thread-Sensitive Modulo Scheduling for Multicore Processors

This paper describes a generalisation of modulo scheduling to parallelise loops for SpMT processors that exploits simultaneously both instruction-level parallelism and thread-level parallelism while preserving the simplicity and effectiveness of modulo scheduling. Our generalisation is simple, drops easily into traditional modulo schedul

• Type: Conference
• Year: 2008
• Where: ICPP
• Authors: Lin Gao 0002, Quan Hoang Nguyen, Lian Li 0002, Jingling Xue, Tin-Fook Ngai
• Keywords: Distributed And Parallel Computing, Generalisation, ICPP 2008, Modulo Scheduling, Traditional Modulo Schedul