Tradeoffs in designing accelerator architectures for visual computing

Visualization, interaction, and simulation (VIS) constitute a class of applications that is growing in importance. This class includes applications such as graphics rendering, video encoding, simulation, and computer vision. These applications are ideally suited for accelerators because of their parallelizability and demand for high throughput. We compile a benchmark suite, VISBench, to serve as a proxy for this application class. We use VISBench to examine some important high level decisions for an accelerator architecture. We propose a highly parallel base architecture. We examine the need for synchronization and data communication. We also examine GPU-style SIMD execution and find that a MIMD architecture is usually preferable. Given these high level choices, we use VISBench to explore the microarchitectural design space. We analyze area versus performance tradeoffs in designing individual cores and the memory hierarchy. We find that a design made of small, simple cores, achieves...

• Type: Conference
• Year: 2008
• Where: MICRO
• Authors: Aqeel Mahesri, Daniel R. Johnson, Neal C. Crago, Sanjay J. Patel
• Keywords: Area Versus Performance, Class Includes Applications, GPU-style SIMD Execution, Hardware, MICRO 2008