Temperature aware task scheduling in MPSoCs

In deep submicron circuits, elevation in temperatures has brought new challenges in reliability, timing, performance, cooling costs and leakage power. Conventional thermal management techniques sacrifice performance to control the thermal behavior by slowing down or turning off the processors when a critical temperature threshold is exceeded. Moreover, studies have shown that in addition to high temperatures, temporal and spatial variations in temperature impact system reliability. In this work, we explore the benefits of thermally aware task scheduling for multiprocessor systems-on-a-chip (MPSoC). We design and evaluate OS-level dynamic scheduling policies with negligible performance overhead. We show that, using simple to implement policies that make decisions based on temperature measurements, better temporal and spatial thermal profiles can be achieved in comparison to stateof-art schedulers. We also enhance reactive strategies such as dynamic thread migration with our scheduli...

• Type: Conference
• Year: 2007
• Where: DATE
• Authors: Ayse Kivilcim Coskun, Tajana Simunic Rosing, Keith Whisnant
• Keywords: Critical Temperature Threshold, DATE 2007, Hardware, OS-level Dynamic Scheduling, Scheduling Policies