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1999
IEEE

Algorithms for Solving Boolean Satisfiability in Combinational Circuits

9 years 4 months ago
Algorithms for Solving Boolean Satisfiability in Combinational Circuits
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalence checking and circuit delay computation, among many other problems. Moreover, Boolean Satisfiability is in the core of algorithms for solving Binate Covering Problems. This paper describes how Boolean Satisfiability algorithms can take circuit structure into account when solving instances derived from combinational circuits. Potential advantages include smaller run times, the utilization of circuit-specific search pruning techniques, avoiding the overspecification problem that characterizes Boolean Satisfiability testers, and reducing the time for iteratively generating instances of SAT from circuits. The experimental results obtained on several benchmark examples in two different problem domains display dramatic reductions in the run times of the algorithms, and provide clear evidence that computed solutio...
Luís Guerra e Silva, Luis Miguel Silveira,
Added 03 Aug 2010
Updated 03 Aug 2010
Type Conference
Year 1999
Where DATE
Authors Luís Guerra e Silva, Luis Miguel Silveira, João P. Marques Silva
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