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ICCAD
2010
IEEE
140views Hardware» more  ICCAD 2010»
13 years 2 months ago
Reduction of interpolants for logic synthesis
Craig Interpolation is a state-of-the-art technique for logic synthesis and verification, based on Boolean Satisfiability (SAT). Leveraging the efficacy of SAT algorithms, Craig In...
John D. Backes, Marc D. Riedel
CORR
2008
Springer
107views Education» more  CORR 2008»
13 years 4 months ago
Symmetry Breaking for Maximum Satisfiability
Symmetries are intrinsic to many combinatorial problems including Boolean Satisfiability (SAT) and Constraint Programming (CP). In SAT, the identification of symmetry breaking pred...
João Marques-Silva, Inês Lynce, Vasco...
IJCAI
2003
13 years 5 months ago
Combining Two Local Search Approaches to Hypergraph Partitioning
We study leading-edge local search heuristics for balanced hypergraph partitioning and Boolean satisfiability, intending the generalization of such heuristics beyond their origina...
Arathi Ramani, Igor L. Markov
AIPS
2006
13 years 5 months ago
Structure and Problem Hardness: Goal Asymmetry and DPLL Proofs in SAT-Based Planning
In AI Planning, as well as Verification, a successful method is to compile the application into boolean satisfiability (SAT), and solve it with state-of-the-art DPLL-based procedu...
Jörg Hoffmann, Carla P. Gomes, Bart Selman
DATE
1999
IEEE
194views Hardware» more  DATE 1999»
13 years 8 months ago
Algorithms for Solving Boolean Satisfiability in Combinational Circuits
Boolean Satisfiability is a ubiquitous modeling tool in Electronic Design Automation, It finds application in test pattern generation, delay-fault testing, combinational equivalen...
Luís Guerra e Silva, Luis Miguel Silveira, ...
DAC
2006
ACM
14 years 5 months ago
Symmetry detection for large Boolean functions using circuit representation, simulation, and satisfiability
- Classical two-variable symmetries play an important role in many EDA applications, ranging from logic synthesis to formal verification. This paper proposes a complete circuit-bas...
Jin S. Zhang, Alan Mishchenko, Robert K. Brayton, ...
DAC
2005
ACM
14 years 5 months ago
Efficient SAT solving: beyond supercubes
SAT (Boolean satisfiability) has become the primary Boolean reasoning engine for many EDA applications, so the efficiency of SAT solving is of great practical importance. Recently...
Domagoj Babic, Jesse D. Bingham, Alan J. Hu
DAC
2003
ACM
14 years 5 months ago
Shatter: efficient symmetry-breaking for boolean satisfiability
Fadi A. Aloul, Igor L. Markov, Karem A. Sakallah
DAC
2002
ACM
14 years 5 months ago
Solving difficult SAT instances in the presence of symmetry
Research in algorithms for Boolean satisfiability and their efficient implementations [26, 8] has recently outpaced benchmarking efforts. Most of the classic DIMACS benchmarks fro...
Fadi A. Aloul, Arathi Ramani, Igor L. Markov, Kare...
DAC
2000
ACM
14 years 5 months ago
Boolean satisfiability in electronic design automation
João P. Marques Silva, Karem A. Sakallah