Sciweavers

Share
DATE
2006
IEEE

ASIP design and synthesis for non linear filtering in image processing

8 years 10 months ago
ASIP design and synthesis for non linear filtering in image processing
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like filters. Starting from high level descriptions, first algorithmic optimization is accomplished. Then a processor architecture and an instruction set are customized with special respect to the algorithmic computations in order to achieve the specified timing at reasonable complexity. Taking advantage of the programmability of processor architectures, the flexibility of the system is increased, involving e.g. dynamic parameter adjustment and color treatment. ASIP implementation results in 0.13 µm CMOS technology are presented.
Luca Fanucci, Michele Cassiano, Sergio Saponara, D
Added 10 Jun 2010
Updated 10 Jun 2010
Type Conference
Year 2006
Where DATE
Authors Luca Fanucci, Michele Cassiano, Sergio Saponara, David Kammler, Ernst Martin Witte, Oliver Schliebusch, Gerd Ascheid, Rainer Leupers, Heinrich Meyr
Comments (0)
books