Asynchronous two-level logic of reduced cost

— We propose a novel synthesis method of a dual-rail asynchronous two-level logic of reduced cost. It is based on a model that operates under so called modified weak constraints. The logic is implemented as a minimized AND-OR structure, together with the completion detection logic. We formulated and proved the product term minimization constraint that ensures a correct logic behavior. We processed the MCNC benchmarks and generated asynchronous two-level logic. The implementation complexity was compared with the stateof-the-art approach. Using our approach, we achieved a significant improvement.

• Type: Conference
• Year: 2009
• Where: DDECS
• Authors: Igor Lemberski, Petr Fiser
• Keywords: Asynchronous Two-level Logic, Completion Detection Logic, Correct Logic Behavior, DDECS 2009, Hardware