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2006
ACM

Automatic instruction scheduler retargeting by reverse-engineering

9 years 8 months ago
Automatic instruction scheduler retargeting by reverse-engineering
In order to generate high-quality code for modern processors, a compiler must aggressively schedule instructions, maximizing resource utilization for execution efficiency. For a compiler to produce such code, it must avoid structural hazards by being aware of the processor’s available resources and of how these resources are utilized by each instruction. Unfortunately, the most prevalent approach to constructing such a scheduler, manually discovering and specifying this information, is both tedious and error-prone. This paper presents a new approach which, when given a processor or processor model, automatically determines this information. After establishing that the problem of perfectly determining a processor’s structural hazards through probing is not solvable, this paper proposes a heuristic algorithm that discovers most of this information in practice. This can be used either to alleviate the problems associated with manual creation or to verify an existing specification. ...
Matthew J. Bridges, Neil Vachharajani, Guilherme O
Added 14 Jun 2010
Updated 14 Jun 2010
Type Conference
Year 2006
Where PLDI
Authors Matthew J. Bridges, Neil Vachharajani, Guilherme Ottoni, David I. August
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