Sciweavers

Free Online Productivity Tools i2Speak i2Symbol i2OCR iTex2Img iWeb2Print iWeb2Shot i2Type iPdf2Split iPdf2Merge i2Bopomofo i2Arabic i2Style i2Image i2PDF iLatex2Rtf Sci2ools

9

DFT
2002
IEEE

favoriteEmaildiscussreport

102views VLSI» more DFT 2002»

Balanced Redundancy Utilization in Embedded Memory Cores for Dependable Systems

13 years 9 months ago

Balanced Redundancy Utilization in Embedded Memory Cores for Dependable Systems

Download www.ece.neu.edu

Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-

Real-time Traffic

DFT 2002 | VLSI |

claim paper

Related Content

» Optimal Spare Utilization in Repairable and Reliable Memory Cores

» Dynamic task set partitioning based on balancing memory requirements to reduce power consu...

» Static Analysis to Enforce Safe Value Flow in Embedded Control Systems

» Flexible filters load balancing through backpressure for stream programs

» A TransientResilient SystemonaChip Architecture with Support for OnChip and OffChip TMR

» Learning to imitate stochastic time series in a compositional way by chaos

Post Info
More Details (n/a)

Added	14 Jul 2010
Updated	14 Jul 2010
Type	Conference
Year	2002
Where	DFT
Authors	Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri

Comments (0)