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DFT   2002 IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems
Wall of Fame | Most Viewed DFT-2002 Paper
DFT
2002
IEEE
128views VLSI» more  DFT 2002»
10 years 9 months ago
Matrix-Based Test Vector Decompression Using an Embedded Processor
This paper describes a new compression/decompression methodology for using an embedded processor to test the other components of a system-on-a-chip (SoC). The deterministic test v...
Kedarnath J. Balakrishnan, Nur A. Touba
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