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CSREAESA
2003

Common Mistakes in Adiabatic Logic Design and How to Avoid Them

10 years 1 months ago
Common Mistakes in Adiabatic Logic Design and How to Avoid Them
Most so-called “adiabatic” digital logic circuit families reported in the low-power design literature are actually not truly adiabatic, in that they do not satisfy the general definition of adiabatic physical processes, as ones whose energy dissipation tends towards zero as their speed and/or parasitic interactions are decreased. Yet, the need for truly adiabatic design can be proven to be a key requirement for cost-efficient digital design for the majority of general-purpose computing applications in the long run, as technology advances and power dissipation becomes an increasingly stringent limiting factor on system performance. Although they may remain useful for some specialized applications, all of these only semi-adiabatic logic styles (as well as all non-adiabatic logics) are doomed to eventual irrelevance to the bulk of the computing market, most likely within only a few decades. It therefore behooves us to begin emphasizing today how to design truly adiabatic circuits. In...
Michael P. Frank
Added 31 Oct 2010
Updated 31 Oct 2010
Type Conference
Year 2003
Where CSREAESA
Authors Michael P. Frank
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