Compiler-Based Register Name Adjustment for Low-Power Embedded Processors

We preseM an algorithm for compiler-driven regisrer mme adjustment with rhe main goal of power minimization on instruction fetch und mgisterjile access. In mosr instruction set arehirecrure ( E A )designs, the registerjields reside infuted posiriom within the instruction encoding, henceforming stream ofindices on rhe instrucrion bus and ro the regisrerjile address decoder. The number of bit transitions in these sfreams grearly determines rhe power consumption on rhe a d dress bus and the registerfile decoder: While general-purpose registers are semantically indistinguishable and hence inrerchgeable, the panicular register indices do have a dimct impact on power consumption. The algorithms presenred in this paper oddress rhis power minimization problem by remsigning/encoding rhe regisrers so thur the bit transirionswithin the register index streams are minimized.

• Type: Conference
• Year: 2003
• Where: ICCAD
• Authors: Peter Petrov, Alex Orailoglu
• Keywords: Hardware, ICCAD 2003, Rhe Instrucrion Bus, Rhe Main Goal, Rhe Power Consumption