Design and Simulation of a RISC-Based 32-bit Embedded On-Board Computer

This paper presents the design and simulation method for developing a RISC-based 32-bit embedded on-board computer. Instead of the conventional breadboarded prototype, (1) we used the Cadence EDA environment and Logic Modeling hardware simulator to verify the conceptual design. (2) An Aptix FPCB was used to implement the rst-version hardware system. (3) a simple but eective self-made ICE (In- Circuit Emulator) was used to perform target system verication while software was running on IDT 79S381 Evaluation Board. The whole hardware system was rst simulated conceptually under EDA environment, and then was simulated with the basic software codes. This method is eective in an embedded system design. [2].

• Type: Conference
• Year: 1998
• Where: ATS
• Authors: Zhen Guo, He Li, Shuling Guo, Dongsheng Wang
• Keywords: ATS 1998, Cadence EDA Environment, EDA Environment, Hardware, Modeling Hardware Simulator