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IOLTS
2003
IEEE

Designing FPGA based Self-Testing Checkers for m-out-of-n Codes

13 years 10 months ago
Designing FPGA based Self-Testing Checkers for m-out-of-n Codes
The paper describes a specific method for designing selfchecking checkers for m-out-of-n codes. The method is oriented to the Field Programmable Gate Arrays technology and is based on decomposing the sum-ofminterms corresponding to an m-out-of-n code. The selftesting property of the proposed checker is proven for a set of multiple stuck-at faults at input and output poles of a Logic Cell. An estimated complexity of obtained m-outof-n checker demonstrates high efficiency of the proposed method.
A. Matrosova, Vladimir Ostrovsky, Ilya Levin, K. N
Added 04 Jul 2010
Updated 04 Jul 2010
Type Conference
Year 2003
Where IOLTS
Authors A. Matrosova, Vladimir Ostrovsky, Ilya Levin, K. Nikitin
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