Development of PPRAM-link interface (PLIF) IP core for high-speed inter-SoC communication

Abstract-- We are proposing "PPRAM-Link": a new highspeed communication standard for merged-DRAM/logic SoC architecture. PPRAM-Link standard is composed of physical/logical layers and an API for the upper software layer, which are standardized by PPRAM Consortium. We developed a PPRAM-Link Interface IP family, or `PLIF Core" that realizes logical protocols necessary for subaction-level communications, and it can be applied to various applicatioss. In addition, we designed an FPGA-based PCI-to-PPRAM-Link board for interPC/WS communications.

• Type: Conference
• Year: 2001
• Where: ASPDAC
• Authors: Takanori Okuma, Koji Hashimoto, Kazuaki Murakami
• Keywords: ASPDAC 2001, FPGA-based PCI-to-PPRAM-Link Board, Hardware, Merged-dram/logic Soc Architecture, Upper Software Layer