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ICCD
1999
IEEE

Evaluation of Computing in Memory Architectures for Digital Image Processing Applications

13 years 8 months ago
Evaluation of Computing in Memory Architectures for Digital Image Processing Applications
Continuing improvements in semiconductor density are enabling new classes of System-on-a-Chip architectures that combine extensive processing logic and high-density memory. Many of the capabilities of these architectures can be custom tailored to the demands of real-time image processing. This paper identifies and describes candidate computing in memory architectures, and evaluates their performance on several image-processing algorithms.
David L. Landis, Paul T. Hulina, Scott Deno, Luke
Added 03 Aug 2010
Updated 03 Aug 2010
Type Conference
Year 1999
Where ICCD
Authors David L. Landis, Paul T. Hulina, Scott Deno, Luke Roth, Lee D. Coraor
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