Exploiting Coarse-Grained Parallelism to Accelerate Protein Motif Finding with a Network Processor

While general-purpose processors have only recently employed chip multiprocessor (CMP) architectures, network processors (NPs) have used heterogeneous multi-core architectures since the late 1990s. NPs differ qualitatively from workstation and server CMPs in that they replicate many simple, highly efficient processor cores on a chip, rather than a small number of sophisticated superscalar CPUs. In this paper, we compare the performance of one such NP, the Intel IXP 2850, to that of the Intel Pentium 4 when executing a scientific computing workload with a high degree of thread-level parallelism. Our target program, HMMer, is a bioinformatics tool that identifies conserved motifs in protein sequences. HMMer represents motifs as hidden Markov models (HMMs) and spends most of its time executing the well-known Viterbi algorithm to align proteins to these models. Our observations of HMMer on the IXP are therefore relevant to computations in many other domains that rely on the Viterbi algori...

• Type: Conference
• Year: 2005
• Where: IEEEPACT
• Authors: Ben Wun, Jeremy Buhler, Patrick Crowley
• Keywords: Hardware, Heterogeneous Multi-core Architectures, HMMer Represents Motifs, IEEEPACT 2005, Viterbi Algorithm