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ARITH
2011
IEEE

Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI

7 years 11 months ago
Fast Ripple-Carry Adders in Standard-Cell CMOS VLSI
— This paper presents a number of new high-radix ripple-carry adder designs based on Ling’s addition technique and a recently-published expansion thereof. The proposed adders all have one inverting CMOS cell per stage along the carry-in to carry-out critical path and, at 16-b wordlengths, the fastest of them matches the speed of a 16-b prefix adder for only 63% of the area. These adders will be of use in VLSI circuits implementing modern wireless DSP algorithms and in FloatingPoint Unit exponent logic, both of which typically use short wordlength arithmetic. Keywords-Adders, CMOS VLSI, Ling
Neil Burgess
Added 12 Dec 2011
Updated 12 Dec 2011
Type Journal
Year 2011
Where ARITH
Authors Neil Burgess
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