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ASPDAC
2005
ACM

A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines

10 years 6 months ago
A high performance synthesisable unsymmetrical reconfigurable fabric for heterogeneous finite state machines
- The use of synthesizable reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such domain-special cores are being used for their flexibility, powerful function and low power consumption. A reconfigurable Finite State Machine (FSM) is constantly required for the purpose of control in any reconfigurable SoC. This paper presents a novel unbalanced unsymmetrical reconfigurable architecture for generic FSM; Compared with commercial FPGA devices, the new architecture results in area reduction of 43% and power consumption decrease of 82%.
Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lind
Added 13 Oct 2010
Updated 13 Oct 2010
Type Conference
Year 2005
Where ASPDAC
Authors Zhenyu Liu, Tughrul Arslan, Sami Khawam, Iain Lindsay
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