Impact of process variations on multicore performance symmetry

Multi-core architectures introduce a new granularity at which process variations may occur, yielding asymmetry among cores that were designed—and that software expects—to be symmetric in performance. The chief source of this phenomenon are highly correlated, “systematic” within-die variations such as optical imperfections yielding variations across the exposure field. Per-core voltages can be used to bring all cores to the same performance level, but this compensation strategy also affects power, chiefly due to leakage power. Boosting a core’s frequency may therefore boost its leakage sufficiently to engage thermal throttling. This sets up a tradeoff between static performance asymmetry due to frequency variation versus dynamic performance asymmetry due to thermal throttling. This paper explores the potential magnitude of these effects.

• Type: Conference
• Year: 2007
• Where: DATE
• Authors: Eric Humenay, David Tarjan, Kevin Skadron
• Keywords: DATE 2007, Hardware, Imperfections Yielding Variations, Performance Asymmetry, Thermal Throttling