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6

ISPD
2006
ACM

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Optimal partitioned fault-tolerant bus layout for reducing power in nanometer designs

13 years 10 months ago

Optimal partitioned fault-tolerant bus layout for reducing power in nanometer designs

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Shanq-Jang Ruan, Edwin Naroska, Chun-Chih Chen

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Added	14 Jun 2010
Updated	14 Jun 2010
Type	Conference
Year	2006
Where	ISPD
Authors	Shanq-Jang Ruan, Edwin Naroska, Chun-Chih Chen

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