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2004
IEEE

A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms

8 years 12 months ago
A Partitioning Methodology for Accelerating Applications in Hybrid Reconfigurable Platforms
In this paper, we propose a methodology for partitioning and mapping computational intensive applications in reconfigurable hardware blocks of different granularity. A generic hybrid reconfigurable architecture is considered so as the methodology can be applicable to a large number of heterogeneous reconfigurable platforms. The methodology mainly consists of two stages, the analysis and the mapping of the application onto fine and coarse-grain hardware resources. A prototype framework consisting of analysis, partitioning and mapping tools has been also developed. For the coarse-grain reconfigurable hardware, we use our previous-developed high-performance coarse-grain datapath. In this work, the methodology is validated using two real-world applications, an OFDM transmitter and a JPEG encoder. In the case of the OFDM transmitter, a maximum clock cycles decrease of 82% relative to the ones in an all fine-grain mapping solution is achieved. The corresponding performance improvement for t...
Michalis D. Galanis, Athanasios Milidonis, George
Added 20 Aug 2010
Updated 20 Aug 2010
Type Conference
Year 2004
Where DATE
Authors Michalis D. Galanis, Athanasios Milidonis, George Theodoridis, Dimitrios Soudris, Constantinos E. Goutis
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