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Postsilicon Validation Methodology for Microprocessors

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Postsilicon Validation Methodology for Microprocessors
f abstraction as applicable to break the problem's complexity, and innovating better techniques to address complexity of new microarchitectural features. Validation techniques may be broadly classified as presilicon and postsilicon. Most of the presilicon validation is done either on a register transfer-level (RTL) simulator or an emulator and has been the primary technique successfully used by a number of commercial manufacturers.1-14 After the first silicon is ready, postsilicon validation is done in a system environment to flush out bugs missed in presilicon validation. Typical reasons for this are the slow simulation speed that prevents running a large number of tests, tests requiring long execution times, testing done close to release in a hasty manner, tests not run in a particular mode, innovations in circuit technology, and so forth. Typical postsilicon errors are from interactions between different components in very improbable corner cases; MIPS R4000, data showed that s...
Hemant G. Rotithor
Added 18 Dec 2010
Updated 18 Dec 2010
Type Journal
Year 2000
Where DT
Authors Hemant G. Rotithor
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