Procedure placement using temporal-ordering information: dealing with code size expansion

Abstract— In a direct-mapped instruction cache, all instructions that have the same memory address modulo the cache size, share a common and unique cache slot. Instruction cache conflicts can be partially handled at linked time by procedure placement. Pettis and Hansen give in [1] an algorithm that reorders procedures in memory by aggregating them in a greedy fashion. The Gloy and Smith algorithm [2] greatly decreases the number of conflict-misses but increases the code size by allowing gaps between procedures. The latter contains two main stages: the cache-placement phase assigns modulo addresses to minimizes cache-conflicts; the memory-placement phase assigns final memory addresses under the modulo placement constraints, and minimizes the code size expansion. In this paper: (1) we prove the NP-completeness of the cache-placement problem; (2) we provide an optimal algorithm to the memory-placement problem with complexity O(n min(n, L)α(n)) (n is the number of procedures, L the ...

• Type: Conference
• Year: 2004
• Where: CASES
• Authors: Christophe Guillon, Fabrice Rastello, Thierry Bidault, Florent Bouchez
• Keywords: Cache, Cache Size, CASES 2004, Code Size