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GLVLSI
2008
IEEE

A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip

8 years 4 months ago
A process and supply variation tolerant nano-CMOS low voltage, high speed, a/d converter for system-on-chip
This paper presents a process variation tolerant, SoC ready, 1GS/s, 6 bit flash analog-to-digital converter (ADC) suitable for integration into nanoscale digital CMOS technologies. The physical de
Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
Added 09 Nov 2010
Updated 09 Nov 2010
Type Conference
Year 2008
Where GLVLSI
Authors Dhruva Ghai, Saraju P. Mohanty, Elias Kougianos
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