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VTS
1996
IEEE

Quantitative analysis of very-low-voltage testing

13 years 9 months ago
Quantitative analysis of very-low-voltage testing
Some weak static CMOS chips can be detected by testing them with a very low supply voltage -- between 2 and 2.5 times the threshold voltage Vt of the transistors. A weak chip is one that contains a flaw -- an imperfection that does not interfere with correct operation at rated conditions but which may cause intermittent or early-life failures. This paper considers several types of flaws and derives the test conditions for them. It also proposes two approaches for determining the appropriate test speed for very-low-voltage testing.
Jonathan T.-Y. Chang, Edward J. McCluskey
Added 07 Aug 2010
Updated 07 Aug 2010
Type Conference
Year 1996
Where VTS
Authors Jonathan T.-Y. Chang, Edward J. McCluskey
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