Sciweavers

VTS
1996
IEEE
114views Hardware» more  VTS 1996»
13 years 8 months ago
Quantitative analysis of very-low-voltage testing
Some weak static CMOS chips can be detected by testing them with a very low supply voltage -- between 2 and 2.5 times the threshold voltage Vt of the transistors. A weak chip is o...
Jonathan T.-Y. Chang, Edward J. McCluskey
ITC
1996
IEEE
99views Hardware» more  ITC 1996»
13 years 8 months ago
Detecting Delay Flaws by Very-Low-Voltage Testing
The detectability of delay flaws can be improved by testing CMOS IC's with a very low supply voltage -between 2 and 2.5 times the threshold voltage Vt of the transistors. A d...
Jonathan T.-Y. Chang, Edward J. McCluskey
ISSS
1999
IEEE
125views Hardware» more  ISSS 1999»
13 years 8 months ago
Real-Time Task Scheduling for a Variable Voltage Processor
This paper presents a real-time task scheduling technique with a variable voltage processor which can vary its supply voltage dynamically. Using such a processor, running tasks wi...
Takanori Okuma, Tohru Ishihara, Hiroto Yasuura
ISQED
2009
IEEE
126views Hardware» more  ISQED 2009»
13 years 11 months ago
New subthreshold concepts in 65nm CMOS technology
In this paper challenges observed in 65nm technology for circuits utilizing subthreshold region operation are presented. Different circuits are analyzed and simulated for ultra lo...
Farshad Moradi, Dag T. Wisland, Hamid Mahmoodi, Al...
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 4 months ago
Prioritized Prime Implicant Patterns Puzzle for Novel Logic Synthesis and Optimization
Compare CMOS Logic with Pass-Transistor Logic, a question was raised in our mind: "Does any rule exist that contains all good?" This paper reveals novel logic synthesis ...
Kuo-Hsing Cheng, Shun-Wen Cheng