Sciweavers

Share
GECCO
2007
Springer

Reducing the number of transistors in digital circuits using gate-level evolutionary design

9 years 5 months ago
Reducing the number of transistors in digital circuits using gate-level evolutionary design
This paper shows that the evolutionary design of digital circuits which is conducted at the gate level is able to produce human-competitive circuits at the transistor level. In addition to standard gates, we utilize unconventional gates (such as the NAND/NOR gate and NOR/NAND gate) that consist of a few transistors but exhibit non-trivial 3-input logic functions. Novel implementations of adders and majority circuits evolved using these gates contain fewer transistors than the smallest existing implementations of these circuits. Moreover, it was shown that the use of these gates significantly improves the success rate of the search process. Categories and Subject Descriptors B.6.1 [Hardware]: Design Styles—Combinational logic; B.6.3 [Hardware]: Logic Design—Design Aids; I.2.m [Artificial Intelligence]: Miscellaneous General Terms Algorithms Keywords digital circuits, evolvable hardware, evolutionary design
Zbysek Gajda, Lukás Sekanina
Added 07 Jun 2010
Updated 07 Jun 2010
Type Conference
Year 2007
Where GECCO
Authors Zbysek Gajda, Lukás Sekanina
Comments (0)
books