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GLVLSI
2010
IEEE

Reliability analysis of power gated SRAM under combined effects of NBTI and PBTI in nano-scale CMOS

9 years 1 months ago
Reliability analysis of power gated SRAM under combined effects of NBTI and PBTI in nano-scale CMOS
Transistor aging effects (NBTI and PBTI) impact the reliability of SRAM in nano-scale CMOS technologies. In this research, the combined effect of NBTI and PBTI on power gated SRAM is analyzed. Optimal source biasing in the standby mode is presented as an effective method for guard-banding against the aging effects. The simulations results in a predictive 32nm technology shows
Anuj Pushkarna, Hamid Mahmoodi
Added 12 Oct 2010
Updated 12 Oct 2010
Type Conference
Year 2010
Where GLVLSI
Authors Anuj Pushkarna, Hamid Mahmoodi
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