Reliability-Aware Co-Synthesis for Embedded Systems

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As technology scales, transient faults have emerged as a key challenge for reliable embedded system design. This paper proposes a design methodology that incorporates reliability into hardware

Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vi

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ASAP 2004 | Embedded Systems | Hardware | Hardwaresoftware Co-design Paradigm | Multi-rate Embedded Systems |

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Added	20 Aug 2010
Updated	20 Aug 2010
Type	Conference
Year	2004
Where	ASAP
Authors	Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin

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