Retargetable estimation scheme for DSP architecture selection

— Given the recent wave of innovation and diversification in digital signal processor (DSP) architecture, the need for quickly evaluating the true potential of considered architectural choices for a given application has been rising. We propose a new scheme, called Retargetable Estimation, that involves analysis of a high-level description of a DSP application, with aggressive optimization search, to provide a performance estimate of its optimal implementation on the architectures considered. With this scheme, we present a new parameterized architecture model that allows quick retargeting to a wide range of architectural choices, and that emphasizes capturing an architecture's salient optimizing features. We show that for a set of DSP benchmarks and two full applications, hand-optimized performance can be predicted reliably. We applied this scheme to two different processors.

• Type: Conference
• Year: 2000
• Where: ASPDAC
• Authors: Naji Ghazal, A. Richard Newton, Jan M. Rabaey
• Keywords: Architectural Choices, ASPDAC 2000, Digital Signal Processor, Hardware, Parameterized Architecture Model