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ASPDAC
2000
ACM
95views Hardware» more  ASPDAC 2000»
13 years 9 months ago
Retargetable estimation scheme for DSP architecture selection
— Given the recent wave of innovation and diversification in digital signal processor (DSP) architecture, the need for quickly evaluating the true potential of considered archite...
Naji Ghazal, A. Richard Newton, Jan M. Rabaey
LCPC
2005
Springer
13 years 10 months ago
Compiler Supports and Optimizations for PAC VLIW DSP Processors
Abstract. Compiler is substantially regarded as the most essential component in the software toolchain to promote a successful processor design. This paper describes our preliminar...
Yung-Chia Lin, Chung-Lin Tang, Chung-Ju Wu, Ming-Y...
VLSISP
2008
159views more  VLSISP 2008»
13 years 4 months ago
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores
The compiler is generally regarded as the most important software component that supports a processor design to achieve success. This paper describes our application of the open re...
Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin...
RTCSA
2006
IEEE
13 years 10 months ago
Integrating Compiler and System Toolkit Flow for Embedded VLIW DSP Processors
To support high-performance and low-power for multimedia applications and for hand-held devices, embedded VLIW DSP processors are of research focus. With the tight resource constr...
Chi Wu, Kun-Yuan Hsieh, Yung-Chia Lin, Chung-Ju Wu...
SCOPES
2004
Springer
13 years 10 months ago
Instruction Selection for Compilers that Target Architectures with Echo Instructions
Echo Instructions have recently been introduced to allow embedded processors to provide runtime decompression of LZ77-compressed programs at a minimal hardware cost compared to oth...
Philip Brisk, Ani Nahapetian, Majid Sarrafzadeh