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2009
IEEE

SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems

11 years 7 days ago
SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache reconfiguration is a promising approach for reducing energy consumption as well as for improving overall system performance. It is a major challenge to introduce cache reconfiguration into real-time embedded systems since dynamic analysis may adversely affect tasks with real-time constraints. This paper presents a novel approach for implementing cache reconfiguration in soft real-time systems by efficiently leveraging static analysis during execution to both minimize energy and maximize performance. To the best of our knowledge, this is the first attempt to integrate dynamic cache reconfiguration in real-time scheduling techniques. Our experimental results using a wide variety of applications have demonstrated that our approach can significantly (up to 74%) reduce the overall energy consumption of the cache hierarchy in soft real-time systems.
Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
Added 23 Nov 2009
Updated 23 Nov 2009
Type Conference
Year 2009
Where VLSID
Authors Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
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