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VLSID
2009
IEEE
182views VLSI» more  VLSID 2009»
10 years 6 months ago
Fuzzy Logic Based Guidance to Graph Grammar Framework for Automated Analog Circuit Design
Abstract— This paper introduces a fuzzy logic based guidance architecture to a graph grammar framework for automated design of analog circuits. The grammar generates circuit topo...
Angan Das, Ranga Vemuri
VLSID
2009
IEEE
144views VLSI» more  VLSID 2009»
11 years 11 days ago
Exploring Carbon Nanotube Bundle Global Interconnects for Chip Multiprocessor Applications
The current paradigm of using Cu interconnects for on-chip global communication is rapidly becoming a serious performance bottleneck in ultra-deep submicron (UDSM) technologies. C...
Sudeep Pasricha, Nikil Dutt, Fadi J. Kurdahi
VLSID
2009
IEEE
220views VLSI» more  VLSID 2009»
11 years 11 days ago
A 7T/14T Dependable SRAM and its Array Structure to Avoid Half Selection
We propose a novel dependable SRAM with 7T cells and their array structure that avoids a half-selection problem. In addition, we introduce a new concept, "quality of a bit (Q...
Hidehiro Fujiwara, Shunsuke Okumura, Yusuke Iguchi...
VLSID
2009
IEEE
139views VLSI» more  VLSID 2009»
11 years 11 days ago
Improving Scalability and Per-Core Performance in Multi-Cores through Resource Sharing and Reconfiguration
Increasing the number of cores in a multi-core processor reduces per-core performance. On the other hand, providing more resources to each core limits the number of cores on a chi...
Tameesh Suri, Aneesh Aggarwal
VLSID
2009
IEEE
107views VLSI» more  VLSID 2009»
11 years 11 days ago
Temperature Aware Scheduling for Embedded Processors
Power density has been increasing at an alarming rate in recent processor generations resulting in high on-chip temperature. Higher temperature results in poor reliability and inc...
Ramkumar Jayaseelan, Tulika Mitra
VLSID
2009
IEEE
141views VLSI» more  VLSID 2009»
11 years 11 days ago
A Comparison of Approaches to Carrier Generation for Zigbee Transceivers
Leburu Manojkumar, Arun Mohan, Nagendra Krishnapur...
VLSID
2009
IEEE
119views VLSI» more  VLSID 2009»
11 years 11 days ago
Single Ended Static Random Access Memory for Low-Vdd, High-Speed Embedded Systems
Abstract-- Single-ended static random access memory (SESRAM) is well known for their tremendous potential of low active power and leakage dissipations. In this paper, we present a ...
Jawar Singh, Jimson Mathew, Saraju P. Mohanty, Dhi...
VLSID
2009
IEEE
108views VLSI» more  VLSID 2009»
11 years 11 days ago
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems
Abstract--Digital control for embedded systems often requires low-power, hard real-time computation to satisfy high control-loop bandwidth, low latency, and low-power requirements....
Forrest Brewer, João Pedro Hespanha, Nitin ...
VLSID
2009
IEEE
115views VLSI» more  VLSID 2009»
11 years 11 days ago
Efficient Techniques for Directed Test Generation Using Incremental Satisfiability
Functional validation is a major bottleneck in the current SOC design methodology. While specification-based validation techniques have proposed several promising ideas, the time ...
Prabhat Mishra, Mingsong Chen
VLSID
2009
IEEE
155views VLSI» more  VLSID 2009»
11 years 11 days ago
Unified Challenges in Nano-CMOS High-Level Synthesis
: The challenges in nano-CMOS circuit design include the following: variability, leakage, power, thermals, reliability, and yield. This talk will focus on interdependent considerat...
Saraju P. Mohanty
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