Scalable Router Memory Architecture Based on Inter-leaved DRAM: Analysis and Numerical Studies

1  Routers need buffers to store and forward packets, especially when there is network congestion. With current memory technology, neither the SRAM nor the DRAM alone is suitable for high-speed Internet routers that require both large capacity and fast access time. Some previous work has been carried out to combine the two technologies together and made a hybrid memory system [1]. In this paper, we base the router memory on the interleaved DRAM architecture and propose an efficient memory management algorithm (CM-MMA) for it. The main advantage of the CM-MMA is that it can scale to a very large capacity while only employing small enough SRAM to guarantee a fast access time. The CM-MMA is also more responsive to traffic than previously proposed solutions, especially in light traffic situations. We perform both analysis and numerical studies to the CM-MMA. We also show simulation results that conform to them very well.

• Type: Conference
• Year: 2007
• Where: ICC
• Authors: Feng Wang, Mounir Hamdi
• Keywords: Communications, Fast Access Time, ICC 2007, Large Capacity, Routers Need Buffers