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MICRO
2009
IEEE

SCARAB: a single cycle adaptive routing and bufferless network

13 years 10 months ago
SCARAB: a single cycle adaptive routing and bufferless network
As technology scaling drives the number of processor cores upward, current on-chip routers consume substantial portions of chip area and power budgets. Since existing research has greatly reduced router latency overheads and capitalized on available on-chip bandwidth, power constraints dominate interconnection network design. Recently research has proposed bufferless routers as a means to alleviate these constraints, but to date all designs exhibit poor operational frequency, throughput, or latency. In this paper, we propose an efficient bufferless router which lowers average packet latency by 17.6% and dynamic energy by 18.3% over existing bufferless on-chip network designs. In order to maintain the energy and area benefit of bufferless routers while delivering ultra-low latencies, our router utilizes an opportunistic processor-side buffering technique and an energy-efficient circuit-switched network for delivering negative acknowledgments for dropped packets. Categories and Su...
Mitchell Hayenga, Natalie D. Enright Jerger, Mikko
Added 24 May 2010
Updated 24 May 2010
Type Conference
Year 2009
Where MICRO
Authors Mitchell Hayenga, Natalie D. Enright Jerger, Mikko H. Lipasti
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