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2010

SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips

8 years 6 months ago
SunFloor 3D: A Tool for Networks on Chip Topology Synthesis for 3-D Systems on Chips
Three-dimensional integrated circuits (3D-ICs) are a promising approach to address the integration challenges faced by current systems on chips (SoCs). Designing an efficient network on chip (NoC) interconnect for a 3-D SoC that meets not only the application performance constraints but also the constraints imposed by the 3-D technology is a significant challenge. In this paper, we present a design tool, SunFloor 3D, to synthesize application-specific 3-D NoCs. The proposed tool determines the best NoC topology for the application, finds paths for the communication flows, assigns the network components to the 3-D layers, and places them in each layer. We perform experiments on several SoC benchmarks and present a comparative study between 3-D and 2-D NoC designs. Our studies show large improvements in interconnect power consumption (average of 38%) and delay (average of 13%) for the 3-D NoC when compared to the corresponding 2-D implementation. Our studies also show that the synthesize...
Ciprian Seiculescu, Srinivasan Murali, Luca Benini
Added 21 May 2011
Updated 21 May 2011
Type Journal
Year 2010
Where TCAD
Authors Ciprian Seiculescu, Srinivasan Murali, Luca Benini, Giovanni De Micheli
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