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DATE
2009
IEEE

System-level hardware-based protection of memories against soft-errors

9 years 8 months ago
System-level hardware-based protection of memories against soft-errors
We present a hardware-based approach to improve the resilience of a computer system against the errors occurred in the main memory with the help of error detecting and correcting (EDAC) codes. Checksums are placed in the same type of memory locations and addressed in the same way as normal data. Consequently, the checksums are accessible from the exterior of the main memory just as normal data and this enables implicit fault-tolerance for interconnection and solidstate secondary storage sub-systems. A small hardware module is used to manage the sequential retrieval of checksums each time the integrity of the data accessed by the processor sub-system needs to be verified. The proposed approach has the following properties: (a) it is cost efficient since it can be used with simple storage and interconnection sub-systems that do not possess any inherent EDAC mechanism, (b) it allows on-line modifications of the memory protection levels, and (c) no modification of the application software...
Valentin Gherman, Samuel Evain, Mickael Cartron, N
Added 20 May 2010
Updated 20 May 2010
Type Conference
Year 2009
Where DATE
Authors Valentin Gherman, Samuel Evain, Mickael Cartron, Nathaniel Seymour, Yannick Bonhomme
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