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DATE
2009
IEEE
115views Hardware» more  DATE 2009»
8 years 8 months ago
Making DNA self-assembly error-proof: Attaining small growth error rates through embedded information redundancy
Abstract--DNA self-assembly is emerging as the most promising technique for nanoscale self-assembly as it uses the simple, yet precise rules of DNA binding to create macroscale ass...
Saturnino Garcia, Alex Orailoglu
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
8 years 10 months ago
Optimizations of an application-level protocol for enhanced dependability in FlexRay
FlexRay [9] is an automotive standard for high-speed and reliable communication that is being widely deployed for next generation cars. The protocol has powerful errordetection me...
Wenchao Li, Marco Di Natale, Wei Zheng, Paolo Gius...
DATE
2009
IEEE
133views Hardware» more  DATE 2009»
8 years 10 months ago
GCS: High-performance gate-level simulation with GPGPUs
Debapriya Chatterjee, Andrew DeOrio, Valeria Berta...
DATE
2009
IEEE
119views Hardware» more  DATE 2009»
8 years 10 months ago
Predictive models for multimedia applications power consumption based on use-case and OS level analysis
—Power management at any abstraction level is a key issue for many mobile multimedia and embedded applications. In this paper a design workflow to generate system-level power mo...
Patrick Bellasi, William Fornaciari, David Siorpae...
DATE
2009
IEEE
141views Hardware» more  DATE 2009»
8 years 11 months ago
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA
Side channel attacks are known to be efficient techniques to retrieve secret data. In this context, this paper concerns the evaluation of the robustness of triple rail logic agains...
Victor Lomné, Philippe Maurine, Lionel Torr...
DATE
2009
IEEE
163views Hardware» more  DATE 2009»
8 years 11 months ago
Analysis and optimization of fault-tolerant embedded systems with hardened processors
1 In this paper we propose an approach to the design optimization of fault-tolerant hard real-time embedded systems, which combines hardware and software fault tolerance techniques...
Viacheslav Izosimov, Ilia Polian, Paul Pop, Petru ...
DATE
2009
IEEE
103views Hardware» more  DATE 2009»
8 years 11 months ago
Fault-tolerant average execution time optimization for general-purpose multi-processor system-on-chips
1 Fault-tolerance is due to the semiconductor technology development important, not only for safety-critical systems but also for general-purpose (non-safety critical) systems. How...
Mikael Väyrynen, Virendra Singh, Erik Larsson
DATE
2009
IEEE
107views Hardware» more  DATE 2009»
8 years 11 months ago
Sequential logic rectifications with approximate SPFDs
In the digital VLSI cycle, logic transformations are often required to modify the design to meet different synthesis and optimization goals. Logic transformations on sequential ci...
Yu-Shen Yang, Subarna Sinha, Andreas G. Veneris, R...
DATE
2009
IEEE
87views Hardware» more  DATE 2009»
8 years 11 months ago
Runtime reconfiguration of custom instructions for real-time embedded systems
This paper explores runtime reconfiguration of custom instructions in the context of multi-tasking real-time embedded systems. We propose a pseudo-polynomial time algorithm that mi...
Huynh Phung Huynh, Tulika Mitra
DATE
2009
IEEE
155views Hardware» more  DATE 2009»
8 years 11 months ago
Automatically mapping applications to a self-reconfiguring platform
The inherent reconfigurability of SRAM-based FPGAs enables the use of configurations optimized for the problem at hand. Optimized configurations are smaller and faster than their g...
Karel Bruneel, Fatma Abouelella, Dirk Stroobandt
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