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DAC
2000
ACM

Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter

14 years 5 months ago
Systematic design of a 14-bit 150-MS/s CMOS current-steering D/A converter
This paper presents a D/A converter with a 14-bit intrinsic linearity in 0.5?m CMOS technology, which has been designed using a systematic design methodology for current-steering D/A converters. A flexible architecture is proposed for which the design parameters are calculated using a performance-driven top-down design methodology. The layout of the regular structures typical for D/A converters is automatically generated. Measurement results are reported. Due to the systematic design methodology, the design was realized in less than one month total accumulated person effort.
Geert Van der Plas, Jan Vandenbussche, Walter Daem
Added 13 Nov 2009
Updated 13 Nov 2009
Type Conference
Year 2000
Where DAC
Authors Geert Van der Plas, Jan Vandenbussche, Walter Daems, Antal van den Bosch, Georges G. E. Gielen, Willy M. C. Sansen
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