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User-controllable coherence for high performance shared memory multiprocessors

10 years 6 months ago
User-controllable coherence for high performance shared memory multiprocessors
In programming high performance applications, shared address-space platforms are preferable for fine-grained computation, while distributed address-space platforms are more suitable for coarse-grained computation. However, currently only distributed address-space systems scale beyond the low hundreds of processors. In this paper we introduce a hybrid architecture that allows users to trade off local memory usage for coherence communication, making possible larger-scale shared memory architectures. We introduce a programming model and examine possible implementations of hardware mechanisms, evaluating some of the trade-offs inherent in each. Preliminary experiments on an application with particularly fine-grained communication requirements indicate that effective placement of directives can reduce coherence communication by more than a factor of 10 for 64 processors. Categories and Subject Descriptors C.0 [Computer Systems Organization]: General—
Collin McCurdy, Charles N. Fischer
Added 05 Jul 2010
Updated 05 Jul 2010
Type Conference
Year 2003
Where PPOPP
Authors Collin McCurdy, Charles N. Fischer
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